The Von Neumann Architecture: Registers and System Buses

SS1 Term 1 • Week 5

About 45 minutes

In Week 1, we introduced the high-level concept of the Von Neumann Architecture and examined the tri-bus communication highway (Address, Data, and Control buses).

Now, we zoom inside the Central Processing Unit itself. How does the processor keep track of which instruction to run next? When data arrives from RAM, where does it sit while the ALU is calculating?

It sits in Internal Registers! Registers are the fastest, most expensive, and most critical memory locations in the entire computer universe. In this lesson, we will dissect the five essential special-purpose registers: PC, MAR, MDR, CIR, and ACC.

Learning Outcomes

By the end of this lesson, you will be able to:

Identify the five core special-purpose registers inside the CPU.
Explain the role of the Program Counter (PC) in maintaining instruction sequence.
Trace data flow between the MAR, MDR, and external RAM.
Describe the role of the Accumulator (ACC) in holding immediate computational results.

Key Vocabulary

Register	Full Name	Primary Responsibility
PC	Program Counter	Holds the memory address of the next instruction to be fetched from RAM.
MAR	Memory Address Register	Holds the address of the memory location currently being read from or written to.
MDR	Memory Data Register	Holds the raw data or instruction byte that was just read from (or about to be written to) RAM.
CIR	Current Instruction Register	Holds the instruction currently being decoded and executed by the Control Unit.
ACC	Accumulator	Holds the temporary intermediate results of ALU arithmetic and logic operations.

Internal CPU Architecture Diagram

+-------------------------------------------------------------------------+
|                  CENTRAL PROCESSING UNIT (CPU)                          |
|                                                                         |
|  +--------------------+                                                 |
|  | PROGRAM COUNTER    | ---(Copies address to MAR)--->+                 |
|  |      (PC)          |                               |                 |
|  +--------------------+                               v                 |
|                                            +--------------------+       |
|                                            | MEMORY ADDRESS     |       |
|                                            | REGISTER (MAR)     |       |
|                                            +--------------------+       |
|                                                       |                 |
|                                              (Address Bus Outward)      |
|                                                       v                 |
|  +--------------------+                    ===========================  |
|  | CURRENT INSTRUCT.  | <--(Copies code)-- | MEMORY DATA        |       |
|  | REGISTER (CIR)     |                    | REGISTER (MDR)     |       |
|  +--------------------+                    +--------------------+       |
|            |                                          ^                 |
|    (Decoded by CU)                                    | (Data Bus)      |
|            v                                          v                 |
|  +--------------------+                    ===========================  |
|  | ARITHMETIC LOGIC   |                                                 |
|  |     UNIT (ALU)     | <================> [ ACCUMULATOR (ACC) ]        |
|  +--------------------+                    Temporary math result holder |
+-------------------------------------------------------------------------+

Study Notes: The Specialized Registers in Action

1. The Program Counter (PC)

The Program Counter is the conductor's baton: - It does not hold instructions; it holds addresses (pointers). - At the start of a program, the PC points to memory address 0x0001. - As soon as that instruction address is copied to the MAR, the PC automatically increments by 1 (PC = PC + 1), pointing ready to fetch the next instruction!

2. The Memory Address Register (MAR)

The MAR connects directly to the external Address Bus: - Whenever the CPU needs to read an instruction from RAM, or save a calculation result into RAM, the target memory address is loaded into the MAR.

3. The Memory Data Register (MDR)

The MDR connects directly to the external Data Bus: - It acts as the buffer loading dock. - When RAM sends data across the Data Bus, the bits land in the MDR first before being routed to the CIR or ALU.

4. The Current Instruction Register (CIR)

Once an instruction lands in the MDR, it is copied into the CIR: - The instruction is split into two parts: - Opcode (Operation Code): What to do (e.g., ADD, LOAD, STORE). - Operand: The data or memory address to do it to (e.g., address 0x004A). - The Control Unit decodes the opcode and triggers the necessary electronic control lines.

5. The Accumulator (ACC)

The Accumulator is the ALU's personal scratchpad: - When the ALU adds $5 + 3$, the answer $8$ is stored directly into the Accumulator. - If the next instruction says "Multiply by 2", the ALU takes the $8$ already sitting in the Accumulator, multiplies it, and writes the new result $16$ back into the Accumulator!

Worked Example: Register Transfer Notation (RTN)

When the CPU fetches an instruction from memory, how do the registers communicate? Computer scientists use Register Transfer Notation (RTN):

$\text{MAR} \leftarrow [\text{PC}]$
(Copy the memory address from the Program Counter into the Memory Address Register).
$\text{PC} \leftarrow [\text{PC}] + 1$
(Increment the Program Counter to point to the next instruction).
$\text{MDR} \leftarrow [\text{Memory}]_{\text{MAR}}$
(Fetch the instruction from RAM at the address specified by the MAR, and place it into the MDR).
$\text{CIR} \leftarrow [\text{MDR}]$
(Copy the instruction from the MDR into the Current Instruction Register for decoding).

Practical Class Activity: The Register Simulation Walkthrough

Trace the state of registers during this mini-assembly program: - Instruction 1 (at Address 10): LOAD 50 (Loads 50 into Accumulator) - Instruction 2 (at Address 11): ADD 20 (Adds 20 to Accumulator) - Instruction 3 (at Address 12): STORE 15 (Stores Accumulator into Address 15)

In your notebook, complete the register state tracking table:

Step	PC Value	MAR Value	MDR Value	ACC Value
After Fetching Inst 1	`11`	`10`	`LOAD 50`	`0`
After Executing Inst 1	`11`	`10`	`50`	`50`
After Executing Inst 2	`12`	`11`	`20`	`70`
After Executing Inst 3	`13`	`15`	`70`	`70`

Common Mistakes & Corrections

Common Mistake	Why It Is Incorrect	Proper Correction
"The Program Counter holds the instruction itself."	The PC only holds the memory address (pointer) of the instruction, not the instruction text.	The PC holds the address; the CIR holds the instruction.
"MAR and MDR are the same register."	MAR holds addresses (connected to Address Bus); MDR holds data (connected to Data Bus).	MAR = Address; MDR = Data.

Notebook Summary

Copy Into Your Computing Notebook

PC (Program Counter): Holds address of the next instruction; increments automatically.
MAR (Memory Address Register): Holds memory address currently being accessed.
MDR (Memory Data Register): Holds data/instruction fetched from or written to RAM.
CIR (Current Instruction Register): Holds active instruction being decoded by the CU.
ACC (Accumulator): Holds intermediate arithmetic and logical results from the ALU.