Skip to content
Skip to main content

Binary Arithmetic & Two's Complement Signed Representation

SS1 Term 1 • Week 4
About 45 minutes
Learning goals: Perform binary addition following the four fundamental addition rules, managing carry bits. • Explain how computers represent signed negative integers using the Two's Complement method. • Convert negative decimal numbers into two's complement binary bytes. • Detect and explain Arithmetic Overflow in fixed-width registers.

In Weeks 2 and 3, we explored how computers represent positive integers and hexadecimal codes.

However, real-world computing requires more than just counting upwards: - A bank balance can drop into an overdraft (negative funds: $-₦5,000$). - An airplane altimeter measures elevation below sea level ($-150\text{ meters}$). - A computer game character loses health points.

How can a processor made of electronic circuits that understand only 0 and 1 perform subtraction and represent negative numbers without needing a physical minus sign?

In this lesson, we will master Binary Addition, explore the ingenious Two's Complement method, and learn how computers perform subtraction using addition circuitry alone!


Learning Outcomes

By the end of this lesson, you will be able to:

  1. Perform binary addition with multi-bit carries.
  2. Explain the Sign Bit convention in signed binary registers.
  3. Generate Two's Complement representations for negative integers.
  4. Perform binary subtraction using two's complement addition ($A - B = A + (-B)$).
  5. Detect and explain Arithmetic Overflow.

Key Vocabulary

Term Technical Meaning
Binary Addition Adding base-2 digits: $0+0=0, \ 0+1=1, \ 1+0=1, \ 1+1=10_2, \ 1+1+1=11_2$.
Sign Bit The most significant (leftmost) bit in a signed integer; 0 = Positive, 1 = Negative.
One's Complement Inverting every bit in a binary string (flipping 0 to 1 and 1 to 0).
Two's Complement Inverting all bits and adding 1; the universal standard for signed integer math in microprocessors.
Arithmetic Overflow An error condition occurring when a calculation exceeds the maximum capacity of a register.

The Four Fundamental Rules of Binary Addition

Rule 1:  0 + 0 = 0
Rule 2:  0 + 1 = 1
Rule 3:  1 + 0 = 1
Rule 4:  1 + 1 = 10_2  (Sum = 0, Carry = 1 to the next column)
Rule 5:  1 + 1 + 1 = 11_2 (Sum = 1, Carry = 1)  <-- Occurs when there is an incoming carry!

Addition Example:

Add $(1011)_2$ and $(0110)_2$:

     1  1       <-- Carries
     1  0  1  1   (11 in decimal)
  +  0  1  1  0   ( 6 in decimal)
  -------------
     1  0  0  0  1   (17 in decimal)  (16 + 1 = 17) \checkmark

Representing Negative Numbers: Two's Complement

Why do all modern processors (Intel, AMD, ARM, Apple Silicon) use Two's Complement? Because it allows the CPU's Arithmetic Logic Unit to perform subtraction using the exact same addition circuits! The ALU never needs to subtract; it simply adds the negative two's complement!

Two-Step Method to Find Two's Complement:

  1. Step 1 (Invert): Write the positive number in fixed bits (e.g., 8 bits), then flip all bits (0 becomes 1, and 1 becomes 0). This is the One's Complement.
  2. Step 2 (Add 1): Add 1 to the least significant bit of the result.

Example: Represent $-19$ in an 8-Bit Two's Complement Register

  1. Write positive $+19$ in 8-bit binary:

$$+19 = \mathbf{00010011_2}$$

  1. Invert all bits (One's Complement):

$$\text{Inverted} = \mathbf{11101100_2}$$

  1. Add 1:
    $$\begin{aligned} & 11101100 \
  2. \ & 00000001 \ \hline & \mathbf{11101101_2} \end{aligned}$$

Thus, $-19$ in an 8-bit computer register is stored as: 11101101!
Notice: The leftmost bit (MSB) is 1, indicating that the value is negative.


Subtraction as Addition: $A - B = A + (-B)$

Let us calculate: $25 - 9 = 16$ using 8-bit two's complement:

  1. $+25$ in 8-bit binary $= \mathbf{00011001_2}$
  2. $+9$ in 8-bit binary $= 00001001_2$
    $-9$ in Two's Complement: Invert $\to 11110110 + 1 = \mathbf{11110111_2}$
  3. Add $(+25) + (-9)$:
       0 0 0 1 1 0 0 1   (+25)
    +  1 1 1 1 0 1 1 1   (-9)
    ------------------
     1 0 0 0 1 0 0 0 0
    
  4. In fixed 8-bit arithmetic, the 9th carry bit overflows beyond the register and is discarded.
  5. The remaining 8 bits are: 00010000 $= 16_{10}$!
    The subtraction succeeded perfectly using only addition!

Practical Class Activity: Binary Arithmetic Drills

Perform the following calculations in your notebook:

  1. Binary Addition:
       1 1 0 1
    +  0 1 0 1
    ----------
    
    (Answer: $13 + 5 = 18_{10} = \mathbf{10010_2}$)
  2. Find the 8-bit Two's Complement for:
  3. a) $-5$ → $+5 = 00000101 \to \text{Invert: } 11111010 + 1 = \mathbf{11111011_2}$
  4. b) $-12$ → $+12 = 00001100 \to \text{Invert: } 11110011 + 1 = \mathbf{11110100_2}$

Common Mistakes & Corrections

Common Mistake Why It Is Incorrect Proper Correction
"Forgetting to add 1 after inverting bits." Inverting alone is only One's Complement; it produces an invalid system with two zeros (+0 and -0). You must always add 1 to complete the Two's Complement.
"Assuming 1 + 1 = 2 in binary." The digit '2' does not exist in Base 2. $1 + 1 = 10_2$ (write 0 and carry 1 to the next left column).

Notebook Summary

Copy Into Your Computing Notebook

  • Binary Addition: $1 + 1 = 10_2$ (0 carry 1); $1 + 1 + 1 = 11_2$ (1 carry 1).
  • Two's Complement: Invert all bits (One's Complement) and add 1.
  • In signed registers, the MSB (leftmost bit) indicates the sign: 0 = Positive, 1 = Negative.
  • Two's complement allows CPUs to perform subtraction using simple addition hardware ($A - B = A + (-B)$).

Check your understanding

In binary addition, what is the result of adding 1 + 1?
What are the two systematic steps to find the Two's Complement of a binary number?
In an 8-bit signed two's complement register, what does it mean if the leftmost bit (the Sign Bit) is 1?
What is 'Arithmetic Overflow' in CPU arithmetic?
Feedback appears after you check your answer.